1. Field
Apparatuses and methods consistent with exemplary embodiments relate to a system and a method for register transfer level (RTL) auto-integration using a spread sheet and a computer readable recording medium thereof.
2. Description of the Related Art
In general, design of a circuit that configures a specific device or system is performed in a manner that a register transfer level (RTL) design is prepared for a target circuit, functional verification of the target circuit is performed through simulation, the RTL design is changed to a gate level design through logic synthesis after completion of the RTL simulation, and verification of the gate level design is performed through the simulation.
In the related art, an RTL integration is performed using a direct coding method that is performed by a person in a one-by-one manner. However, an amount of data to be coded may be massive such that a skilled engineer needs to perform a coding task in a longer time period (e.g., more than one month) depending on a size of a system on chip (SOC). Also, even in the case of partially modifying the existing SOC that is previously designed, it may be difficult to reuse the existing RTL and thus the coding needs to be newly performed, which causes inconvenience to the user.